With rapid advancement of the fabrication technology of thin film transistors (TFT), the new generation of LED displays are largely applied in various portable electronic products due to the fact it has advantages of higher emitting efficiency, higher responding rate, non-restriction of view angle, smaller size, less weight and lower power consumption.
However, the conventional digital display systems, such as digital cameras, image telephones, video CD (compact disc) players, global positioning systems (GPS), and so on, are typically provided with a cathode ray tube television (CRT TV) in conjunction with a digital display panel, such as LCD or LED displays, for displaying video images. The CRT TV is a display device which is devised to process composite video signals (abbreviated as Cvideo) in compliance with standard television standards, such as the NTSC (National Television System Committee), SECAM (Sequential Chrominance And Memory), and PAL (Phase Alternation by Line) standards. A Cvideo signal is composed of a horizontal synchronizing signal (Hs), a vertical synchronizing signal (Vs), a clock signal (CLK) and the RGB signals of the video image.
FIG. 1 is a schematic block diagram of a conventional display driving circuit for driving a CRT TV and an LED display to generate video images. As shown, a composite synchronizing signal generator 102 is used to combine a horizontal synchronizing signal and a vertical synchronizing signal generated by a central process unit (CPU) 100, and a clock signal (CLK) generated by a timing control circuit 101, into a composite synchronizing signal (Csync). Meanwhile, the data of a digital dot matrix (i.e., the video image to be displayed on the CRT TV and LED display) stored in a display memory unit 103 are converted by the digital-to-analog (D/A) converter 104 into analog form and then transferred to the video encoder 105.
The video encoder 105 then processes the analog output from the D/A converter 104 and the Csync signal from the composite synchronizing signal generator 102 to thereby produce a composite video signal Cvideo. The Cvideo signal is applied directly to drive the CRT TV to display the video image. It is also transferred to the LED driving circuit (the bottom part of the circuit of FIG. 1) for further processing to obtain a suitable signal form that can be applied to drive the LED display.
Alternately, the Cvideo signal can be generated through another method, for which the circuit components involved are drawn in dashed lines in FIG. 1. As shown, a digital encoder 106 can be used to process the output of the timing control circuit 101 and the digital dot matrix data stored in the display memory unit 103 to thereby generate the Cvideo signal. The Cvideo signal is applied directly to drive the CRT TV and is also transferred to the LED driving circuit for further processing to obtain a suitable signal form that can be used to drive the LED display.
The LED display includes an array of pixels, and each pixel unit consists of a red dot (R), a green dot (G), and a blue dot (B). Therefore, for the LED devices fabricated in each pixel unit, it is necessary to input digital data for combining and generating the desired video image data with prescribed colors or intensity levels. However, because these RGB dots are digitally controlled to display the associated video images, the LED display is different in structure and display method from the CRT TV. And the analog Cvideo signal needs to be further processed and decoded to digital signals before the video image can be displayed on the LCD.
The LED driving circuit is the bottom part of the circuit of FIG. 1, which includes a video decoder 111, a video amplifier 112, a D/A converter 113, a digital gamma-correction circuit 114, a synchronizing signal separator 120, an LED timing control circuit 121, a phase locked loop (PLL) circuit 122, a shut-down circuit 130, a pulse width modulator (PWM) 131 and a filtering circuit 132. As shown, in the LED driving circuit, the Cvideo signal is first received by the video decoder 111 which then decomposes the Cvideo signal into the respective analog RGB signals and the composite synchronizing signal Csync. The output analog RGB signals are then transferred to the video amplifier 112, while the output Csync signal is transferred to the synchronizing signal separator 120.
The video amplifier 112 amplifies the RGB signals to a suitable level and then transfers the amplified RGB signals to the D/A converter 113 for converting to digital signals. Gamma correction is an optional technique for adjusting the intensity and color quality of the digital signals by using the digital gamma-correction circuit 114. Meanwhile, the output Csync signal from the video decoder 111 is processed by the synchronizing signal separator 120 which decomposes the Csync signal into the original horizontal synchronizing signal Hs and the vertical synchronizing signal Vs. The horizontal synchronizing signal Hs is then transferred to both the LED timing control circuit 121 and the PLL circuit 122. The output of the PLL circuit 122 in response to the input horizontal synchronizing signal Hs is conventionally called a pixel clock signal (abbreviated as P-CLK). The LED timing control circuit 121 takes the vertical synchronizing signal Vs, the horizontal synchronizing signal Hs and the P-CLK signal as inputs, and then processes these signals to obtain the various video control signals required to drive the LED display to generate the video image.
Moreover, since the LED devices and TFT devices fabricated in the LED display both need the corresponding electrical powers for operating, two different DC voltages are required to drive the LED display. The DC voltages are produced by the PWM circuit 131 and the filtering circuit 132. The technique involved for supplying these two DC voltages by the PWM circuit 131 and filtering circuit 132 is conventional and not within the spirit of the invention, so description thereof will not be further detailed.
The LED display receives the output of the digital gamma-correction circuit 114, the output of the LED timing control circuit 121, the output P-CLK signal from the PLL circuit 122 and the output of the PWM circuit 131. These signals, in cooperation, drive the LED display to generate the video image.
When the LED display is not in active use, i.e., no video signal is received, it can be shut down by the shutdown circuit 130. This provision allows the display system to save power consumption when no video image is being displayed on the LED display.
The foregoing conventional LED driving circuit, however, has several drawbacks:
(1) The display of the digital dot-matrix data originally stored in the display memory unit 103 suffers from a reduced fidelity when being displayed on the LED display since these data are first processed into analog form so as to be displayable on the CRT TV and then processed in a reverse manner into digital form so as to be subsequently displayable on the LED display. The fidelity of the displayed image on the LED display is therefore considerably degraded.
(2) The LED driving circuit used to drive the LED display requires the use of quite a large number of circuit components, which causes the manufacturing cost of the LED driving circuit to be considerably high.
(3) Since a large number of circuit components are required, the circuit layout space on the integrated circuit is correspondingly large, causing the integrated circuit to be less compact in size, and power consumption by the LED driving circuit will be large, which makes the utilization of the display system less cost-effective.
(4) Since the Cvideo signal from the CRT TV driving circuit needs to be further processed so as to be displayable on the LED display, the LED driving circuit requires the use of a large number of circuit components to process the Cvideo signal and these circuit components, such as the voltage control oscillator (VCO) in the PLL circuit and the video decoder, require various adjustments before the LED driving circuit can be operable. These requirements considerably increase the manufacturing cost of the LED driving circuit.